P-Channel Logic Level Enhancement Mode Field Effect Transistor
Description
Gr Pr
STU/D435S
Ver 1.0
S a mHop Microelectronics C orp.
P-Channel Logic Level Enhancement Mode Field Effect Transistor
PRODUCT SUMMARY
V DSS
-40V
ID
-38A
R DS(ON) (m Ω) Max
17.5 @ VGS=10V 27 @ VGS=4.5V
FEATURES Super high dense cell design for low R DS(ON). Rugged and reliable. Suface Mount Package.
G S
G D
S
STU SERIES TO - 252AA( D - PAK )
STD ...
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