DatasheetsPDF.com

GM82C765

Hynix Semiconductor
Part Number GM82C765
Manufacturer Hynix Semiconductor
Description FLOPPY DISK SUBSYSTEM CONTROLLER
Published Mar 23, 2005
Detailed Description GM82C765B GM82C765B FLOPPY DISK SUBSYSTEM CONTROLLER General Description The GM82C765B is a CMOS LSI device which inter...
Datasheet PDF File GM82C765 PDF File

GM82C765
GM82C765

Overview
GM82C765B GM82C765B FLOPPY DISK SUBSYSTEM CONTROLLER General Description The GM82C765B is a CMOS LSI device which interfaces a host microprocessor to the floppy disk drive.
It integrates the function of the Formatter/Controller, Data Separator.
Write Precompensation, Data rate selection, Clock Generation, High Current Output Drivers, and TTL compatible Schmitt Trigger Receivers.
The GM82C765B consists of a microprocessor interface, a microsequencer and a disk drive interface.
The host microprocessor interface of the GM82C765B supports a 12MHz, 286 microprocessor bus without the use of wait states.
All inputs within host microprocessor are Schmitt triggers, except for the data bus, XTAL, and the host output sink 12mA.
Output drive capability is 20 LSTTL load, allowing direct interconnection to bus structures without the use of buffers or transceivers.
On the disk drive interface, the GM82C765B includes data seperation that has been designed to address high performance error rate on floppy disk drives, and contains all the necessary logic to achieve classical 2nd order, type2, phase locked loop performance.
Write precompensation is included, in addition to the usual formatting, encoding, decoding, step motor control, and status sensing functions For PC/XT and PC/AT applications, the device provides qualification of interrupt and DMA requests.
The disk drive interface of the GM82C765B connects directly to up to four drives.
All drive-related inputs are Schmitt triggers and the drive outputs are open drain, and sink 48 mA.
The GM82C765B uses two clock inputs which provide the necessary signals for internal timing.
A 16MHz oscillator controls the data rate of 500, 250 and 125Kbits/sec, while a 9.
6MHz oscillator controls the 300Kbit/sec data rate used in PC/AT designs.
The two XTAL oscillator circuits may be used for the 44-pin PLCC package, while TTL clock inputs must be provided when using the 40-pin DIP package.
In the PLCC version of the GM82C765B pins 17 and 40, whi...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)