DatasheetsPDF.com

Si5980DU

Vishay
Part Number Si5980DU
Manufacturer Vishay
Description Dual N-Channel 100-V (D-S) MOSFET
Published Dec 23, 2015
Detailed Description Si5980DU Vishay Siliconix Dual N-Channel 100-V (D-S) MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) 100 0.567 at VGS = 1...
Datasheet PDF File Si5980DU PDF File

Si5980DU
Si5980DU

Overview
Si5980DU Vishay Siliconix Dual N-Channel 100-V (D-S) MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) 100 0.
567 at VGS = 10 V ID (A) 2.
5 Qg (Typ.
) 2.
2 nC PowerPAK® ChipFET Dual 1 S1 2 D1 8 D1 7 6 G1 D2 D2 5 3 S2 4 G2 Marking Code CE XXX Lot Traceability and Date Code Part # Code FEATURES • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • New Thermally Enhanced PowerPAK® ChipFET® Package - Small Footprint Area - Low On-Resistance - Thin 0.
8 mm Profile • Compliant to RoHS Directive 2002/95/EC APPLICATIONS D1 D2 • Load Supply • Power Supply G1 G2 Bottom View Ordering Information: Si5980DU-T1-GE3 (Lead (Pb)-free and Halogen-free) S1 N-Channel MOSFET S2 N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage Continuous Drain Current (TJ = 150 °C) Pulsed Drain Current TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C VGS ID IDM Continuous Source-Drain Diode Current Single Pulse Avalanche Current Avalanche Energy TC = 25 °C TA = 25 °C L = 0.
1 mH TC = 25 °C IS IAS EAS Maximum Power Dissipation TC = 70 °C TA = 25 °C TA = 70 °C PD Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature)d, e TJ, Tstg Limit 100 ± 20 2.
5 2.
0 1.
3b, c 1.
0b, c 3 6a 1.
7b, c 2 0.
2 7.
8 5.
0 2.
0b, c 1.
3b, c - 55 to 150 260 Unit V A mJ W °C THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit Maximum Junction-to-Ambientb, f Maximum Junction-to-Case (Drain) t≤5s Steady State RthJA RthJC 49 13 61 °C/W 16 Notes: a.
Package limited.
b.
Surface Mounted on 1" x 1" FR4 board.
c.
t = 5 s.
d.
See Solder Profile (www.
vishay.
com/ppg?73257).
The PowerPAK ChipFET is a leadless package.
The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing.
A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom s...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)