512Mb (4M x 4Bank x 32) Mobile Synchronous DRAM
Description
Revision History
Revision 0.1 (May. 2010) - First release.
Revision 0.2 (Sep. 2010) - Delete CL=2 parameters - Input Leakage Current = -2μA ~ +2μA - Change Supply Voltage Rating = -0.5 ~ +2.3 - Delete Deep Power Down Mode - Change AC timing paramters: tRC & tIS
Revision 0.3 (Nov. 2010) - Change clock input capacitance value
EM48AM3284LBB
Nov. 2010
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