Hit | Part # | Manufacturer | Description |
---|---|---|---|
33 Hits | CS1628 |
Semico |
Dynamic LED controller RID 。,, ,,,/“ON”; ,。‘00’, 1, 7GRIDs,10SEGs ,。 :2011-03-A 2 11 MOS MSB LSB 0 0 - - - - b1 b0 00:4GRIDs,13SEGs 01:5GRIDs,12SEGs 10:6GRIDs,11SEGs 11:7GRIDs,10SEGs CS1628 2.2.3.1 , ,。‘01’, 0, 。 MSB LSB 0 1 - - b3 b2 b1 b0 00: 10: |
28 Hits | V53C16256SH |
Mosel Vitelic Corp |
256K X 16 FAST PAGE MODE CMOS DYNAMIC RAM WITH SELF REFRESH s 256K x 16-bit organization s Fast Page Mode for a sustained data rate of 43 MHz s RAS access time: 40, 50 ns s Dual CAS Inputs s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, and Self Refresh s Refresh Interva |
16 Hits | UPD4164 |
NEC |
65536 x 1-BIT DYNAMIC RANDOM ACCESS MEMORY Multiplexed address inputs permit the /lPD4164 to be packaged in the standard 16 pin dual-in-line package. The 16 pin package provides the highest system bit densities and is compatible with widely available automated handling equipment. • High Memo |
12 Hits | HMJ4 |
ETC |
High Dynamic Range FET Mixer • +36 dBm IIP3 • No External Matching Elements • • • • • • Product Description The HMJ4 is a high dynamic range, GaAs FET mixer. This active FET mixer realizes a typical third order intercept point of +36 dBm at an LO drive level of +17 dBm. The HMJ |
11 Hits | HYB5117400BJ-50 |
Siemens |
4M x 4-Bit Dynamic RAM 2k & 4k Refresh s) and LV-TTL (3.3 V version)-compatible • Plastic Package: P-SOJ-26/24-1 300 mil P-TSOPII-26/24-1 300 mil Semiconductor Group 1 1998-10-01 HYB 5116(7)400BJ-50/-60 HYB 3116(7)400BJ/BT-50/-60 4M × 4 DRAM The HYB 5(3)116(7)400 are 16 MBit dynamic R |
11 Hits | HM51S4170C |
Hitachi Semiconductor |
Dynamic Random Access Memory • • • Single 5 V ( ±10%) High speed — Access time: 70 ns/80 ns (max) Low power dissipation — Active mode: 660 mW/578 mW (max) — Standby mode: 11 mW (max) 1.1 mW (max) (L-version) Fast page mode capability 1024 refresh cycles: 16 ms 128 ms (L-version) |
10 Hits | AK594096BS |
ACCUTEK |
4194304 Word by 9 Bit CMOS Dynamic Random Access Memory · 4,194,304 x 9 bit organization · Low Profile 30 pad (SIM) Single In-Line Memory · Low Profile 30 pin (SIP) Single In-Line package · JEDEC standard pinout · Common CAS, RAS and WE for the lower eight bits · CAS-before-RAS refresh PIN NOMENCLATURE A |
10 Hits | MAAM-000070 |
Tyco Electronics |
High Dynamic Range Amplifier • Ideal for high linearity applications over a wide dynamic range • Low Noise Figure • High IP3 • Single +5 V Supply Voltage • Lead-Free SOT-89 Package • 100% Matte Tin Plating over Copper • Halogen-Free “Green” Mold Compound www.DataSheet4U.com • Ro |
10 Hits | MK4096-11 |
Mostek |
4096x1-bit dynamic RAM |
9 Hits | PA1217 |
Tyco Electronics |
800-1000 MHz. Low Noise High Dynamic Range Linear Amplifier (typical values) Low Cost Ceramic Surface Mount Package Low NF ..................................................... 0.6 dB. IP3 ........................................................ +40 dBm Pout ................................................... |
9 Hits | K4E660812C |
Samsung |
8M x 8bit CMOS Dynamic RAM of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 8Mx8 EDO Mode DRAM family is fabricated using Samsung ′s advanced CM |
9 Hits | DP8419 |
National Semiconductor |
(DP8417 - DP8419) 64k / 256k Dynamic RAM Controller/Drivers Y Y Y Y Y Y Y Y Y Y Makes DRAM Interface and refresh tasks appear virtually transparent to the CPU making DRAMs as easy to use as static RAMs Specifically designed to eliminate CPU wait states up to 10 MHz or beyond Eliminates 15 to 20 SSI MSI |
9 Hits | TMS465409P |
Texas Instruments |
DYNAMIC RANDOM-ACCESS MEMORIES maximum RAS access times of 40, 50, and 60 ns. All inputs and outputs, including clocks, are compatible with LVTTL. All addresses and data-in lines are latched on chip to simplify system design. Data out is unlatched to allow greater system flexibili |
8 Hits | BSP129 |
Siemens Semiconductor Group |
SIPMOS Small-Signal Transistor (N channel Depletion mode High dynamic resistance) b 40 mm × 40 mm × 1.5 mm with 6 cm2 copper area for drain connection. Semiconductor Group 1 09.96 BSP 129 Electrical Characteristics at Tj = 25 ˚C, unless otherwise specified. Parameter Symbol min. Static Characteristics Drain-source breakdown v |
8 Hits | ADS1201 |
Burr-Brown Corporation |
High Dynamic Range DELTA-SIGMA MODULATOR q q q q q 130dB DYNAMIC RANGE FULLY DIFFERENTIAL INPUT TWO-WIRE INTERFACE INTERNAL/EXTERNAL REFERENCE ON-CHIP SWITCHES FOR CALIBRATION DESCRIPTION The ADS1201 is a precision, 130dB dynamic range, delta-sigma (∆Σ) modulator operating from a single +5 |
8 Hits | CD4062A |
RCA |
CMOS 200-Stage Dynamic Shift Register |
8 Hits | V53C16256H |
Mosel Vitelic Corp |
256K x 16 FAST PAGE MODE CMOS DYNAMIC RAM s 256K x 16-bit organization s Fast Page Mode for a sustained data rate of 53 MHz. s RAS access time: 30, 35, 40, 45, 50, 60 ns s Dual CAS Inputs s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh s Refresh Interval |
8 Hits | K4F661612B |
Samsung |
4M x 16bit CMOS Dynamic RAM of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx16 Fast Page Mode DRAM family is fabricated using Samsung ′s adva |
8 Hits | MK4116N-2 |
Mostek |
16K x 1-BIT DYNAMIC RAM |
8 Hits | MB81F643242C |
Fujitsu Media Devices |
4 X 512 K X 32 BIT SYNCHRONOUS DYNAMIC RAM a fully synchronous operation referenced to a positive edge clock whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. The MB81F643242C SDRAM is designed to reduce the complexi |