| Part Number | PDSP16515A |
| Manufacturer | Zarlink Semiconductor |
| Title | Stand Alone FFT Processor |
| Description | Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as def... |
| Features |
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Ordering Information
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Completely self contained FFT Processor Pin and functionally compatible with the PDSP16510A Expanded width internal RAM supports up to 1024 complex points 18 bit internal data bus with block floating point arithmetic for increased dynamic range 500 MIP opera...
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| File Size | 199.53KB |
| Datasheet |
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PDSP16515A : Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex input data, or a second set of real only inputs. These pins output the real component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. These pins output the imaginary component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. The high going edge of DEF is used to internally latch the contents of AUX15:0, which then define the operating mode. In the simplest system DEF i.
PDSP16515AA0AC : Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex input data, or a second set of real only inputs. These pins output the real component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. These pins output the imaginary component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. The high going edge of DEF is used to internally latch the contents of AUX15:0, which then define the operating mode. In the simplest system DEF i.
PDSP16515AA0GC : Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex input data, or a second set of real only inputs. These pins output the real component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. These pins output the imaginary component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. The high going edge of DEF is used to internally latch the contents of AUX15:0, which then define the operating mode. In the simplest system DEF i.
PDSP16515AB0AC : Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex input data, or a second set of real only inputs. These pins output the real component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. These pins output the imaginary component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. The high going edge of DEF is used to internally latch the contents of AUX15:0, which then define the operating mode. In the simplest system DEF i.
PDSP16515AB0GC : Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex input data, or a second set of real only inputs. These pins output the real component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. These pins output the imaginary component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. The high going edge of DEF is used to internally latch the contents of AUX15:0, which then define the operating mode. In the simplest system DEF i.
PDSP16515AC0AC : Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex input data, or a second set of real only inputs. These pins output the real component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. These pins output the imaginary component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. The high going edge of DEF is used to internally latch the contents of AUX15:0, which then define the operating mode. In the simplest system DEF i.
PDSP16515AC0GC : Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex input data, or a second set of real only inputs. These pins output the real component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. These pins output the imaginary component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. The high going edge of DEF is used to internally latch the contents of AUX15:0, which then define the operating mode. In the simplest system DEF i.
PDSP16515GCPR : Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex input data, or a second set of real only inputs. These pins output the real component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. These pins output the imaginary component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. The high going edge of DEF is used to internally latch the contents of AUX15:0, which then define the operating mode. In the simplest system DEF i.
PDSP16515MA : Data input during real only mode. The real component in complex data mode. When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex input data, or a second set of real only inputs. These pins output the real component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. These pins output the imaginary component of the transformed data when DAV and DEN are active. Otherwise they are high impedance. The high going edge of DEF is used to internally latch the contents of AUX15:0, which then define the operating mode. In the simplest system DEF i.