IS43R16160 32Mx8, 16Mx16 256Mb Synchronous DRAM FEATURES: • Vdd =Vddq = 2.
5V+0.
2V (-5, -6, -75) • Double data rate architecture ; two data transfers per clock cycle.
• Bidirectional , data strobe (DQS) is transmitted/ received with data • Differential clock input (CLK and /CLK) • DLL aligns DQ and DQS transitions with CLK transitions edges of DQS • Commands entered on each positive CLK edge; • Data and data mask referenced to both edges of DQS • 4 bank operation controlled by BA0 , BA1 (Bank Address) • /CAS latency -2.
0 / 2.
5 / 3.
0 (programmable) ; Burst length -2 / 4 / 8 (programmable) Burst type -Sequential / Interleave (programmable) • Auto precharge/ All bank precharge controll...

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