CD40100BMS December 1992 CMOS 32-Stage Static Left/Right Shift Register Description CD40100BMS is a 32-Stage shift register containing 32 D-type master-slave flip-flops.
The data present at the SHIFT RIGHT INPUT is transferred into the first register stage synchronously with the positive CLOCK edge, provided the LEFT/RIGHT CONTROL is at a low level, the RECIRCULATE CONTROL is at a high level, and the CLOCK INHIBIT is low.
If the LEFT/RIGHT CONTROL is at a high level and the RECIRCULATE CONTROL is also high, data at the SHIFT LEFT INPUT is transferred into the 32nd register stage synchronously with the positive CLOCK transition, provided the CLOCK INHIBIT is low.
The state of the LEFT/RIGHT CON...

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