Core Logic $1[ ® $0,+*  PLFURQ &026 *DWH $UUD\ Description AN8x is a family of AND-NOR circuits consisting of two 2-input AND gates into a 3-input NOR gate.
Logic Symbol Truth Table A AN8x ABCDEQ B HHXXX L C Q XXHHX L D XXXXHL All other combinations H E HDL Syntax Verilog .
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AN8x inst_name (Q, A, B, C, D, E); VHDL.
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inst_name: AN8x port map (Q, A, B, C, D, E); Pin Loading Pin Name A B C D E AN82 1.
0 1.
0 1.
0 1.
0 1.
0 Equivalent Loads AN84 1.
0 1.
0 1.
0 1.
0 1.
0 AN86 2.
1 2.
1 2.
1 2.
1 2.
1 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) AN82 AN84 AN86 5.
0 5.
0 11.
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