CMOS Gate Array
Core Logic $1([ $0,+* PLFURQ &026 *DWH $UUD\ Description ANEx is a family of AND-NOR circuits consisting of three 3-input AND gates into a 3-input NOR gate. Logic Symbol Truth Table A ANEx B ABCDE FGH I Q C D HHHXXXXXX L E F Q XXXHHHXXX L G XXXXXXHHH L H I All other combinations H HDL Syntax Verilog .................... ANEx inst_name (Q, ...
AMI