CMOS Gate Array
Core Logic ,7'[ $0,+* PLFURQ &026 *DWH $UUD\ Description ITD1x is a family of inverting internal tristate buffers with active high enable. Logic Symbol Truth Table ITDx E A QN E A QN E A QN LXZ HLH HH L Z = High Impedance HDL Syntax Verilog .................... ITDx inst_name (QN, A, E); VHDL...................... inst_name: ITDx port map (QN, A...
AMI