74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger Rev.
11 — 3 December 2020 Product data sheet 1.
General description The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop.
Information on the data input (nD) is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse (nCP).
The nD input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.
8 V to 3.
6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.
8...

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