Part Number
|
74AUP2G80 |
Manufacturer
|
nexperia |
Description
|
Low-power dual D-type flip-flop |
Published
|
Jul 23, 2019 |
Detailed Description
|
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
Rev. 11 — 7 December 2020
Product data sheet
1. Gen...
|
Datasheet
|
74AUP2G80
|
Overview
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
Rev.
11 — 7 December 2020
Product data sheet
1.
General description
The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop.
Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse.
The input pin D must be stable one setup time prior to the LOW-to-HIGH clock transition for predictable operation.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.
8 V to 3.
6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.
8 V to 3.
6 ...
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