SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY
TMS626812 1048576 BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY SMOS687A –JULY 1996 – REVISED APRIL 1997 D Organization . . . 1M × 8 × 2 Banks D 3.3-V Power Supply (± 10% Tolerance) D Two Banks for On-Chip Interleaving (Gapless Accesses) D High Bandwidth – Up to 83-MHz Data Rates D CAS Latency Programmable to 2 or 3 Cycles From Column-Address ...