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TMS626812B

Texas Instruments
Part Number TMS626812B
Manufacturer Texas Instruments
Description SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY
Published Sep 21, 2019
Detailed Description TMS626812B 1 048 576 BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES SMOS693A – OCTOBER 1997 – REVISED APR...
Datasheet PDF File TMS626812B PDF File

TMS626812B
TMS626812B


Overview
TMS626812B 1 048 576 BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES SMOS693A – OCTOBER 1997 – REVISED APRIL 1998 D Organization 1048576 by 8 Bits by 2 Banks D 3.
3-V Power Supply (± 10% Tolerance) D Two Banks for On-Chip Interleaving (Gapless Accesses) D High Bandwidth – Up to 125-MHz Data Rates D CAS Latency (CL) Programmable to 2 or 3 Cycles From Column-Address Entry D Burst Sequence Programmable to Serial or Interleave D Burst Length Programmable to 1, 2, 4, or 8 D Chip Select and Clock Enable for Enhanced System Interfacing D Cycle-by-Cycle DQ Bus Mask Capability D Auto-Refresh and Self-Refresh Capabilities D 4K Refresh (Total for Both Banks) D High-Speed, Low-Noise, Low-Voltage TTL (LVTTL) Interface D Power-Down Mode D Compatible With JEDEC Standards D Pipeline Architecture D Temperature Ranges Operating, 0°C to 70°C Storage, – 55°C to 150°C D Intel PC100 Compliant (-8A, -8, and -10 Devices) D Performance Ranges: ’626812B-8 ’626812B-8A ’626812B-10 SYNCHRONOUS CLOCK CYCLE TIME tCK3 tCK2 (CL† = 3) (CL = 2) 8 ns 10 ns 8 ns 15 ns 10 ns 15 ns ACCESS TIME (CLOCK TO OUTPUT) tAC3 tAC2 (CL = 3) (CL = 2) 6 ns 6 ns 7.
5 ns 6 ns 7 ns 7.
5 ns REFRESH TIME INTERVAL 64 ms 64 ms 64 ms † CL = CAS latency TMS626812B DGE PACKAGE ( TOP VIEW ) VCC DQ0 VSSQ DQ1 VCCQ DQ2 VSSQ DQ3 VCCQ NC NC W CAS RAS CS A11 A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 VSS 43 DQ7 42 VSSQ 41 DQ6 40 VCCQ 39 DQ5 38 VSSQ 37 DQ4 36 VCCQ 35 NC 34 NC 33 DQM 32 CLK 31 CKE 30 NC 29 A9 28 A8 27 A7 26 A6 25 A5 24 A4 23 VSS PIN NOMENCLATURE A0 – A10 Address Inputs A0 – A10 Row Addresses A0 – A8 Column Addresses (for TMS626812B) A10 Automatic-Precharge Select A11 Bank Select CAS Column-Address Strobe CKE Clock Enable CLK System Clock CS Chip Select DQ[0 :7] SDRAM Data Input / Output (TMS626812B) DQM Data-Input / Data-Output Mask Enable NC No External Connect RAS Row-Address Strobe VCC VCCQ Power Supply (3.
3-V Typical) Power Suppl...



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