March 1998
FDC654P P-Channel Enhancement Mode Field Effect
Transistor
General Description
These P-Channel logic level enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.
This very high density process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage applications such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching, and low in-line power loss are needed in a very small outline surface mount package.
Features
-3.
6 A, -30 V.
RDS(ON) = 0.
075 Ω @ VGS = -10 V RDS(ON) = 0.
125 Ω @ VGS = -4.
5 V.
...