S DP /B 60N03L
S amHop Microelectronics C orp.
May,2004 ver1.
1
N-Channel Logic Level E nhancement Mode Field E ffect
Transistor
4
P R ODUC T S UMMAR Y
V DS S
30V
F E AT UR E S S uper high dense cell design for extremely low R DS (ON).
High power and current handling capability.
TO-220 & TO-263 package.
ID
56A
R DS (on) ( m W ) Max
11 @ V G S = 10V 19 @ V G S = 4.
5V
D
D
G D S
G
S
G
S DP S E R IE S TO-220
S DB S E R IE S TO-263(DD-P AK)
S
ABS OLUTE MAXIMUM R ATINGS (TC =25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous -P ulsed
a
S ymbol V DS V GS @ TJ=125 C ID IDM IS PD T J , T S TG
Limit 30 20 56 168 60 75 -65 to 175
U...