com Features • Utilizes the AVR® RISC Architecture • AVR - High-performance and Low-power RISC Architecture – 118 Powerful Instructions - Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Up to 1MIPS Throughput at 1MHz Data and Nonvolatile Program Memory – 2K Bytes of In-System Programmable Flash Endurance 1,000 Write/Erase Cycles – 128 Bytes of internal SRAM – 128 Bytes of In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles – Programming Lock for Flash Program and EEPROM Data Security Peripheral Features – One 8-bit Timer/Counter with Separate Prescaler – Programmable Watchdog Timer with On-chip Oscillator – SPI Serial Interface ...

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)