Part Number
|
74AUP2G38 |
Manufacturer
|
NXP |
Description
|
Low Power Dual 2-Input NAND Gate |
Published
|
Dec 14, 2006 |
Detailed Description
|
www.DataSheet4U.com
74AUP2G38
Low-power dual 2-input NAND gate (open-drain)
Rev. 01 — 16 October 2006 Product data shee...
|
Datasheet
|
74AUP2G38
|
Overview
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DataSheet4U.
com
74AUP2G38
Low-power dual 2-input NAND gate (open-drain)
Rev.
01 — 16 October 2006 Product data sheet
1.
General description
The 74AUP2G38 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.
8 V to 3.
6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.
8 V to 3.
6 V.
This device is fully specified for partial Power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow ...
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