DDR2 SDRAM MT47H256M4 – 32 Meg x 4 x 8 banks MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks 1Gb: x4, x8, x16 DDR2 SDRAM Features Features • VDD = 1.
8V ±0.
1V, VDDQ = 1.
8V ±0.
1V • JEDEC-standard 1.
8V I/O (SSTL_18-compatible) • Differential data strobe (DQS, DQS#) option • 4n-bit prefetch architecture • Duplicate output strobe (RDQS) option for x8 • DLL to align DQ and DQS transitions with CK • 8 internal banks for concurrent operation • Programmable CAS latency (CL) • Posted CAS additive latency (AL) • WRITE latency = READ latency - 1 tCK • Selectable burst lengths (BL): 4 or 8 • Adjustable data-output drive strength • 64ms, 8192-cycle refresh • On-die termination (ODT) ...

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