Part Number
|
PLL102-109 |
Manufacturer
|
PhaseLink Corporation |
Description
|
Programmable DDR Zero Delay Clock Driver |
Published
|
Oct 28, 2008 |
Datasheet
|
PLL102-109
|
Features
PLL clock distribution optimized for Double Data Rate SDRAM application up to 266Mhz.
• Distributes one clock Input to one bank of six differential outputs.
• Track spread spectrum clocking for EMI reduction.
• Programmable delay between CLK_INT and ...
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