Part Number
|
ADN4662 |
Manufacturer
|
Analog Devices |
Description
|
LVDS Differential Line Receiver |
Published
|
Jun 12, 2009 |
Detailed Description
|
com
Single, 3 V, CMOS, LVDS Differential Line Receiver ADN4662
FUNCTIONAL BLOCK DIAGRAM
VCC
FEATURES
±...
|
Datasheet
|
ADN4662
|
Overview
com
Single, 3 V, CMOS, LVDS Differential Line Receiver ADN4662
FUNCTIONAL BLOCK DIAGRAM
VCC
FEATURES
±15 kV ESD protection on input pins 400 Mbps (200 MHz) switching rates Flow-through pinout simplifies PCB layout 2.
5 ns maximum propagation delay 3.
3 V power supply High impedance outputs on power-down Low power design: typically 3 mW (quiescent) Interoperable with existing 5 V LVDS drivers Accepts small swing (310 mV typical) differential signal levels Supports open, short, and terminated input fail-safe 0 V to −100 mV threshold region Conforms to TIA/EIA-644 LVDS standard Industrial operating temperature range: −40°C to +85°C Available in surface-mount (SOIC) package
ADN4...
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