NB3V8312C Ultra-Low Jitter, Low Skew 1:12 LVCMOS/LVTTL Fanout Buffer The NB3V8312C is a high performance, low skew L VCMOS fanout buffer which can distribute 12 ultra −low jitter clocks from an LVCMOS/LVTTL input up to 250 MHz.
The 12 LVCMOS output pins drive 50 W series or parallel terminated transmission lines.
The outputs can also be disabled to a high impedance (tri−stated) via the OE input, or enabled when High.
The NB3V8312C provides an enable input, CLK_EN pin, which synchronously enables or disables the clock outputs while in the LOW state.
Since this input is internally synchronized to the input clock, changing only when the input is LOW , potential output glitching or runt pulse ge...

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