Si53360/61/62/65 Data Sheet Low-Jitter, LVCMOS Fanout Clock Buffers with up to 12 outputs and Frequency Range from dc to 200 MHz The Si53360/61/62/65 family of LVCMOS fanout buffers is ideal for clock/data distribution and redundant clocking applications.
The family utilizes Silicon Labs advanced CMOS technology to fanout clocks from dc to 200 MHz with guaranteed low additive jitter, low skew, and low propagation delay variability.
Built-in LDOs deliver high PSRR performance and eliminates the need for external components simplifying low jitter clock distribution in noisy environments.
The CMOS buffers are available in multiple configurations with 8 outputs (Si53360/61/65), or dual banks of...

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