74ALVCH16501 18-bit universal bus transceiver; 3-state Rev.
7 — 24 November 2021 Product data sheet 1.
General description The 74ALVCH16501 is an 18-bit universal transceiver with bus hold inputs and 3-state outputs.
Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs.
For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH.
When LEAB is LOW, the A data is latched if CPAB is held at a HIGH or LOW logic level.
If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB.
When OEAB is HIGH, the outputs are active.
When OEAB is LOW, the ou...

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