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P-Channel Logic Level Enhancement
Mode Field Effect Transistor
P5504EVG
SOP-8 Lead-Free
D
PRODUCT SUMMARY V(BR)DSS -40V RDS(ON) 55m ID -5.
5A 4 :GATE 5,6,7,8 :DRAIN 1,2,3 :SOURCE
G S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Drain-Source
Voltage Gate-Source
Voltage Continuous Drain Current Pulsed Drain Current Power Dissipation
1
SYMBOL VDS VGS
LIMITS -40 ±20 -5.
5 -4.
5 -20 2.
5 1.
3 -55 to 150 275
UNITS V V
TC = 25 °C TC = 70 °C
ID IDM
A
TC = 25 °C TC = 70 °C
PD Tj, Tstg TL
W
Operating Junction & Storage Temperature Range Lead Temperature ( /16” from case for 10 sec.
) THERMAL RESISTANCE RATINGS THERMAL RES...