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IS43LR16800G

Part Number	IS43LR16800G
Manufacturer	ISSI
Description	2M x 16Bits x 4Banks Mobile DDR SDRAM
Published	Jun 28, 2016
Detailed Description	IS43/46LR16800G 2M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16800G is 134,217,728 bits CMOS Mobile D...
Datasheet	IS43LR16800G PDF File

Overview

IS43/46LR16800G 2M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16800G is 134,217,728 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 2,097,152 words x 16 bits.
This product uses a double-data-rate architecture to achieve high-speed operation.
The Data Input/ Output signals are transmitted on a 16-bit bus.
The double data rate architecture is essentially a 2N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins.
This product offers fully synchronous operations referenced to both rising and falling edges of the clock.
The data paths are internally pipelined and 2n-bits prefetched to achieve very high bandwidth.
All input and output voltage levels are compatible with LVCMOS.
Features • JEDEC standard 1.
8V power supply.
• VDD = 1.
8V, VDDQ = 1.
8V • Four internal banks for concurrent operation • MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave) • Fully differential clock inputs (CK, /CK) • All inputs except data & DM are sampled at the rising edge of the system clock • Data I/O transaction on both edges of data strobe • Bidirectional data strobe per byte of data (DQS) • DM for write masking only • Edge aligned data & data strobe output • Center aligned data & data strobe input • 64ms refresh period (4K cycle) • Auto & self refresh • Concurrent Auto Precharge • Maximum clock frequency up to 200MHZ • Maximum data rate up to 400Mbps/pin • Power Saving support - PASR (Partial Array Self Refresh) - Auto TCSR (Temperature Compensated Self Refresh) - Deep Power Down Mode - Programmable Driver Strength Control by Full Strength or ¾, ½, ¼ , ⅛ of Full Strength • LVCMOS compatible inputs/outputs • 60-Ball FBGA package Copyright © 2015 Integrated Silicon Solution, Inc.
All rights reserved.
ISSI reserves the right to make changes to this specification and its products at any time without notice.
ISSI assu...

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