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IS61DDB41M36A

Part Number	IS61DDB41M36A
Manufacturer	Integrated Silicon Solution
Description	36Mb DDR-II (Burst 4) CIO SYNCHRONOUS SRAM
Published	Jul 25, 2016
Detailed Description	IS61DDB42M18A IS61DDB41M36A 2Mx18, 1Mx36 36Mb DDR-II (Burst 4) CIO SYNCHRONOUS SRAM JANUARY 2015 FEATURES DESCRIPTION...
Datasheet	IS61DDB41M36A PDF File

Overview

IS61DDB42M18A IS61DDB41M36A 2Mx18, 1Mx36 36Mb DDR-II (Burst 4) CIO SYNCHRONOUS SRAM JANUARY 2015 FEATURES DESCRIPTION  1Mx36 and 2Mx18 configuration available.
 On-chip delay-locked loop (DLL) for wide data valid window.
 Common I/O read and write ports.
 Synchronous pipeline read with late write operation.
 Double Data Rate (DDR) interface for read and write input ports.
 Fixed 4-bit burst for read and write operations.
 Clock stop support.
 Two input clocks (K and K#) for address and control registering at rising edges only.
 Two input clocks (C and C#) for data output control.
 Two echo clocks (CQ and CQ#) that are delivered simultaneously with data.
 +1.
8V core power suppl...

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