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IS42VS16400E

ISSI
Part Number IS42VS16400E
Manufacturer ISSI
Description 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
Published Aug 2, 2016
Detailed Description IS42VS16400E 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM MAY 2009 FEATURES • Clock frequency: 1...
Datasheet PDF File IS42VS16400E PDF File

IS42VS16400E
IS42VS16400E

Overview
IS42VS16400E 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM MAY 2009 FEATURES • Clock frequency: 133 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Single 1.
8V power supply • LVCMOS interface • Programmable burst length – (1, 2, 4, 8, full page) • Programmable burst sequence: Sequential/Interleave • Self refresh modes • 4096 refresh cycles every 64 ms • Random column address every clock cycle • Programmable CAS latency (2, 3 clocks) • Burst read/write and burst read/single write operations capability • Burst termination by burst stop and precharge command • Byte controlled by LDQM and UDQM • Industrial temperature availability • Packages: 400-mil 54-pin TSOP II 54-ball TF-BGA (8mm x 8mm) OVERVIEW ISSI's 64Mb Synchronous DRAM IS42VS16400E is organized as 1,048,576 bits x 16-bit x 4-bank for improved performance.
The synchronous DRAMs achieve high-speed data transfer using pipeline architecture.
All inputs and outputs signals refer to the rising edge of the clock input.
PIN CONFIGURATIONS 54-Pin TSOP (Type II) VDD DQ0 VDDQ DQ1 DQ2 GNDQ DQ3 DQ4 VDDQ DQ5 DQ6 GNDQ DQ7 VDD LDQM WE CAS RAS CS BA0 BA1 A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 GND 53 DQ15 52 GNDQ 51 DQ14 50 DQ13 49 VDDQ 48 DQ12 47 DQ11 46 GNDQ 45 DQ10 44 DQ9 43 VDDQ 42 DQ8 41 GND 40 NC 39 UDQM 38 CLK 37 CKE 36 NC 35 A11 34 A9 33 A8 32 A7 31 A6 30 A5 29 A4 28 GND PIN DESCRIPTIONS A0-A11 BA0, BA1 DQ0 to DQ15 CLK CKE Address Input Bank Select Address Data I/O System Clock Input Clock Enable CS RAS CAS Chip Select Row Address Strobe Command Column Address Strobe Command WE LDQM UDQM VDD GND VDDq GNDq NC Write Enable Lower Bye, Input/Output Mask Upper Bye, Input/Output Mask Power Ground Power Supply for DQ Pin Ground for DQ Pin No Connection Copyright © 2005 Integrated Silicon Solution, Inc.
All rights reserved.
I...


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