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PI6C4921506

Pericom Semiconductor
Part Number PI6C4921506
Manufacturer Pericom Semiconductor
Description High Performance LVDS Fanout Buffer
Published Sep 19, 2016
Detailed Description PI6C4921506 High Performance LVDS Fanout Buffer Features ÎÎ6 LVDS outputs ÎÎUp to 1.5GHz output frequency ÎÎUltra low a...
Datasheet PDF File PI6C4921506 PDF File

PI6C4921506
PI6C4921506


Overview
PI6C4921506 High Performance LVDS Fanout Buffer Features ÎÎ6 LVDS outputs ÎÎUp to 1.
5GHz output frequency ÎÎUltra low additive phase jitter: < 0.
03 ps (typ) (differential 156.
25MHz, 12KHz to 20MHz integration range) ÎÎSingle differential input ÎÎLow delay from input to output (Tpd typ.
< 1.
5ns) ÎÎSeparate Input output supply voltage for level shifting ÎÎ2.
5V / 3.
3V power supply ÎÎIndustrial temperature support ÎÎTSSOP-24 package Description The PI6C4921506 is a high performance fanout buffer devicewhich supports up to 1.
5GHz frequency.
The device also uses Pericom's proprietary input detection technique to make sure illegal input conditions will be detected and reflected by output states.
This device is ideal for systems that need to distribute low jitter clock signals to multiple destinations.
Applications ÎÎNetworking systems including switches and Routers ÎÎHigh frequency backplane based computing and telecom platforms Block Diagram 15-0080 Pin Configuration (24-Pin TSSOP) nCLK CLK VDD VDDO Q0 nQ0 GND Q1 nQ1 VDDO Q2 nQ2 1 2 3 4 5 6 7 8 9 10 11 12 24 GND 23 GND 22 VDD 21 VDDO 20 nQ5 19 Q5 18 GND 17 nQ4 16 Q4 15 VDDO 14 nQ3 13 Q3 1 www.
pericom.
com Rev B 06/18/15 Pinout Table Pin # 1, 2 3, 22 4, 10, 15, 21 5, 6 7, 18, 23, 24 8, 9 11, 12 13, 14 16, 17 19, 20 Pin Name nCLK CLK VDD VDDO Q0 nQ0 GND Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Input Power Power Output Power Output Output Output Output Output Type PI6C4921506 High Performance LVDS Fanout Buffer Description Differential clock input Power supply IO power supply LVDS output clock Ground LVDS output clock LVDS output clock LVDS output clock LVDS output clock LVDS output clock Clock Input Function Table CLK 0 1 Inputs nCLK 1 0 Outputs Q0:Q5 LOW HIGH nQ0:nQ5 HIGH LOW 0 Biased LOW HIGH 1 Biased Biased Biased 0 1 HIGH HIGH LOW LOW LOW HIGH Input to Output Mode Differential to Differential Differential to Differential Single Ended to Differential Single Endded to Differential Single Endded t...



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