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UT54ACTS365

Aeroflex Circuit Technology
Part Number UT54ACTS365
Manufacturer Aeroflex Circuit Technology
Description Hex Buffers/Line Drivers
Published Oct 4, 2016
Detailed Description Standard Products UT54ACS365/UT54ACTS365 Hex Buffers/Line Drivers with Three-State Outputs Datasheet November 2010 www.a...
Datasheet PDF File UT54ACTS365 PDF File

UT54ACTS365
UT54ACTS365


Overview
Standard Products UT54ACS365/UT54ACTS365 Hex Buffers/Line Drivers with Three-State Outputs Datasheet November 2010 www.
aeroflex.
com/logic FEATURES ‰ 1.
2μ CMOS - Latchup immune ‰ High speed ‰ Low power consumption ‰ Single 5 volt supply ‰ Available QML Q or V processes ‰ Flexible package - 16-pin DIP - 16-lead flatpack ‰ UT54ACS365- SMD 5962-96586 ‰ UT54ACTS365 - SMD 5962-96587 DESCRIPTION The UT54ACS365 and UT54ACTS365 are non-inverting hex buffer and line driver with three-state outputs.
The output enables (OE1 and OE2) control the three-state outputs.
If OE1 or OE2 is high, the outputs will be in a high impedance state.
For data, both OE1 and OE2 must be low.
The devices are characterized over full military temperature range of -55°C to +125°C.
FUNCTION TABLE OE1 L L X H INPUTS OE2 L L H X OUTPUT AY LL HH XZ XZ LOGIC SYMBOL (1) OE1 (15) OE2 & EN PINOUTS OE1 A1 Y1 A2 Y2 A3 Y3 VSS (2) A1 (4) A2 (6) A3 (10) A4 (12) A5 A6 (14) (3) Y1 (5) Y2 (7) Y3 (9) Y4 (11) Y5 (13) Y6 Note: 1.
Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
1 16-Pin DIP Top View OE1 1 16 VDD A1 2 15 OE2 Y1 3 14 A6 A2 4 13 Y6 Y2 5 12 A5 A3 6 11 Y5 Y3 7 10 A4 VSS 8 9 Y4 16-Lead Flatpack Top View 1 16 2 15 3 14 4 13 5 12 6 11 7 10 89 VDD OE2 A6 Y6 A5 Y5 A4 Y4 LOGIC DIAGRAM A6 (14) A5 (12) (13) Y6 (11) Y5 A4 (10) A3 (6) (9) Y4 (7) Y3 A2 (4) (5) Y2 OE2 OE1 (15) (1) A1 (2) (3) Y1 2 OPERATIONAL ENVIRONMENT1 PARAMETER Total Dose SEU Threshold 2 SEL Threshold Neutron Fluence LIMIT 1.
0E6 80 120 1.
0E14 UNITS rads(Si) MeV-cm2/mg MeV-cm2/mg n/cm2 Notes: 1.
Logic will not latchup during radiation exposure within the limits defined in the table.
2.
Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER LIMIT UNITS VDD Supply voltage -0.
3 to 7.
0 V VI/O TSTG TJ TLS ΘJC II Voltage any pin Storage Temperature range Maximum junction temperature Lead temperature (soldering 5 seconds) Thermal re...


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