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NCP81230H Datasheet PDF


Part Number NCP81230H
Manufacturer ON Semiconductor
Title Precise Low Voltage Synchronous Buck Controller
Description NCP81230H Product Preview Precise Low Voltage Synchronous Buck Controller with Power Saving Mode http://onsemi.com The NCP81230H is a simple si...
Features also include soft−start sequence, accurate overvoltage and over current protection, UVLO for VCC and VCCP, and thermal shutdown. Features
• High Performance Operational Error Amplifier
• Internal Soft−Start/Stop
• ±0.5% Internal Voltage Accuracy, 0.8 V voltage reference
• OCP accuracy, Four Re−entry...

File Size 114.87KB
Datasheet NCP81230H PDF File








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NCP81228 : Pin No. 1 2 3 4 5 6 7 8 9 Pin Name IOUT EN SDIO ALERT# SCLK VR_RDY VCC PSYS VRMP Description Total output current monitor for eight−phase regulator Enable. High enables both rails Serial VID data interface Serial VID ALERT# Serial VID clock VR_RDY indicates both rails are ready to accept SVID commands Power for the internal control circuits. A decoupling capacitor is connected from this pin to ground System power signal input. A resistor to ground scales this signal Feed−forward input of Vin for the ramp−slope compensation. The current fed into this pin is used to control the ramp of the PWM slopes 10 VR_HOT# OD output. Indicates high VR temperature 11 IOUTA Total output current mon.

NCP81232 : Pin Name 1 VIN 2 EN1 3 EN2 4 DRVON 5 PGOOD1 6 PGOOD2 7 FAULT 8 DLY1 9 DLY2 /DDR 10 SS 11 FSET 12 CNFG 13 ILIMT2 Type Power Input Analog Input Analog Input Logic Input Logic Output Logic Output Logic Output Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Description Power Supply Input. Power supply input pin of the device, which is connected to the integrated 5V LDO. 4.7 mF or more ceramic capacitors must bypass this input to power ground. The capacitors should be placed as close as possible to this pin. Enable 1. Logic high enables channel 1 and logic low disables channel 1. Input supply UVLO can be programmed at this pin for chann.

NCP81234 : Pin Name Type Description 1 VIN Power Input Power Supply Input. Power supply input pin of the device, which is connected to the integrated 5 V LDO. 4.7 mF or more ceramic capacitors must bypass this input to power ground. The capac- itors should be placed as close as possible to this pin. 2 EN1 Analog Input Enable 1. Logic high enables channel 1 and logic low disables channel 1. Input supply UVLO can be programmed at this pin for channel 1. 3 EN2 Analog Input Enable 2. Logic high enables channel 2 and logic low disables channel 2. Input supply UVLO can be programmed at this pin for channel 2. 4 DRVON Logic Input Driver On. Logic high input means drivers’ power is ready. .

NCP81239 : Pin Pin Name Description 1 HSG1 S1 gate drive. Drives the S1 N−channel MOSFET with a voltage equal to VDRV superimposed on the switch node voltage VSW1. 2 LSG1 Drives the gate of the S2 N−channel MOSFET between ground and VDRV. 3, 22 PGND Power ground for the low side MOSFET drivers. Connect these pins closely to the source of the bottom N−channe.

NCP81239A : Pin Pin Name Description 1 HSG1 S1 gate drive. Drives the S1 N−channel MOSFET with a voltage equal to VDRV superimposed on the switch node voltage VSW1. 2 LSG1 Drives the gate of the S2 N−channel MOSFET between ground and VDRV. 3, 22 PGND Power ground for the low side MOSFET drivers. Connect these pins closely to the source of the bottom N−channe.

NCP81242 : Pin Name Type 1 VRHOT# Logic Output 2 SDIO Logic Bidirectional 3 ALERT# Logic Output 4 SCLK Logic Input 5, 32, 49 GND Analog Ground 6 VRRDY Logic Output 7, 11−17, 50 VIN Power Input 8 BST Power Bidirectional 9 GH Analog Output 10 SW Power Return 18, 25−29, 51 19−24 SW PGND Power Output Power Ground 30 GL Analog Output 31 VBOOT Analog Input 33 VCCP Analog Power 34 TSENSE Analog 35 IMAX Analog Input 36 IOUT Analog Output 37 ILIM Analog Output 38 CSCOMP Analog Output 39 CSSUM Analog Input 40 CSREF Analog Input 41 FREQ Analog Input 42 COMP Analog 43 FB Analog Input 44 DIFFOUT Analog Output 45 VSN Analog Input 46 VSP Analog Input 47 VCC Analog Power 48 E.

NCP81243 : NCP81243 Dual Output 3 & 2 Phase Controller with Single Intel Proprietary Interface for Desktop and Notebook CPU Applications www.onsemi.com The NCP81243 dual output three plus two phase buck solutions are optimized for Intel®’s IMVP8 CPUs. The NCP81243 offer five PWM drive signals that can be configured in multiple setups. The controller combines true differential voltage sensing, differential inductor DCR current sensing, input voltage feed−forward, and adaptive voltage positioning to provide accurately regulated power for both desktop and notebook applications. The control system is based on Dual−Edge pulse−width modulation (PWM) combined with DCR current sensing providing an ultra fas.

NCP81245 : NCP81245 Three-Rail Output Controller with Single Intel Proprietary Interface for Desktop and Notebook CPU Applications www.onsemi.com The NCP81245 (3+3+1 phase) three−output buck solution is optimized for Intel’s IMVP8 CPUs. The two multi−phase rail control systems are based on Dual−Edge pulse−width modulation (PWM) combined with DCR current sensing providing an ultra fast initial response to dynamic load events and reduced system cost. The single−phase rail makes use of ON Semiconductor’s patented high performance RPM operation. RPM control maximizes transient response while allowing for smooth transitions between discontinuous−frequency−scaling operation and continuous−mode full−power .

NCP81246 : NCP81246 Three-Rail Controller with Intel Proprietary Interface for IMVP8 CPU Applications The NCP81246 contains a two-phase, and two single-phase buck regulators optimized for Intel IMVP8 compatible CPUs. The two-phase controller combines true differential voltage sensing, differential inductor DCR current sensing, input voltage feed-forward, and adaptive voltage positioning to provide accurately regulated power for IMVP8 Rail2. The two single-phase controllers can be used for Rail1, Rail3 and Rail4 rails. Both make use of ON Semiconductor’s patented enhanced RPM operation. RPM control maximizes transient response while allowing for smooth transitions between discontinuous frequency scalin.

NCP81248 : NCP81248 Three-Rail Controller with Intel Proprietary Interface for IMVP8 CPU Applications The NCP81248 contains a two−phase, and two single−phase buck regulator controllers optimized for Intel IMVP8 compatible CPUs. www.onsemi.com The two−phase controller combines true differential voltage sensing, differential inductor DCR current sensing, input voltage feed−forward, and adaptive voltage positioning to provide accurately regulated power for IMVP8 CPU. MARKING DIAGRAM The two single−phase controllers make use of ON Semiconductor’s patented high performance RPM operation. RPM control maximizes transient response while allowing smooth transitions between discontinuous frequency scali.

NCP81250 : Pin Name Type 1 VRHOT# Logic Output 2 SDIO Logic Bidirectional 3 ALERT# Logic Output 4 SCLK Logic Input 5, 32, 49 GND Analog Ground 6 VRRDY Logic Output 7, 11−17, 50 VIN Power Input 8 BST Power Bidirectional 9 GH Analog Output 10 SW Power Return 18, 25−29, 51 19−24 SW PGND Power Output Power Ground 30 GL Analog Output 31 VBOOT Analog Input 33 VCCP Analog Power 34 TSENSE Analog 35 IMAX Analog Input 36 IOUT Analog Output 37 ILIM Analog Output 38 CSCOMP Analog Output 39 CSSUM Analog Input 40 CSREF Analog Input 41 FREQ Analog Input 42 COMP Analog 43 FB Analog Input 44 DIFFOUT Analog Output 45 VSN Analog Input 46 VSP Analog Input 47 VCC Analog Pow.

NCP81251 : Pin Name Type Description 1 VRHOT# Logic Output VR HOT. Logic low output represents over temperature. 2 SDIO Logic Bidirectional Serial Data IO Port. Data port of SVID interface. 3 ALERT# Logic Output ALERT. Open−drain output. Provides a logic low valid alert signal of SVID interface. 4 SCLK Logic Input Serial Clock. Clock input of SVID interface. 5, 32, 49 GND Analog Ground Analog Ground. Ground of internal control circuits. Must be connected to the system ground. 6 VRRDY Logic Output Voltage Regulator Ready. Open−drain output. Provides a logic high valid power good output signal, indicating the regulator’s output is in regulation window. 7, 11−17, 50 VIN Power Input P.

NCP81252 : Pin Name Type Description 1 VRHOT# Logic Output VR HOT. Logic low output represents over temperature. 2 SDIO Logic Bidirectional Serial Data IO Port. Data port of SVID interface. 3 ALERT# Logic Output ALERT. Open−drain output. Provides a logic low valid alert signal of SVID interface. 4 SCLK Logic Input Serial Clock. Clock input of SVID interface. 5, 32, 49 GND Analog Ground Analog Ground. Ground of internal control circuits. Must be connected to the system ground. 6 VRRDY Logic Output Voltage Regulator Ready. Open−drain output. Provides a logic high valid power good output signal, indicating the regulator’s output is in regulation window. 7, 11−17, 50 VIN Power Input Pow.

NCP81253 : Pin No. Pin Name Description 1 BST Floating bootstrap supply pin for the high−side gate driver. Connect the external bootstrap capacitor between this pin and SW. 2 PWM Control input: PWM = High ³ DRVH is high, DRVL is low. PWM = Mid ³ DRVH and DRVL are low. PWM = Low ³ DRVH is low, DRVL is high. 3 EN 3−state input: EN = High ³ Driver is enabled; normal PWM operation. EN = Mid ³ Driver is enabled; DRVH and DRVL are low (body diode braking). EN = Low ³ Driver is disabled. 4 VCC Power supply input. Connect a bypass capacitor from this pin to ground. 5 DRVL Low−side gate drive output. Connect to the gate of the low−side MOSFET. 6 GND Bias and reference ground. All signals are.

NCP81255 : Pin No. Symbol Description 1 VR_HOT# Thermal Logic Output for Over-Temperature Condition on either TSENSE 2 SDIO Serial VID Data Interface 3 ALERT# Serial VID ALERT# 4 SCLK Serial VID Clock 5 PGND Power Ground. Power Supply Ground Pins, Connected to Source of Internal LS FET 6 VR_RDY VR_RDY Indicates the Controller is Ready to Accept Intel proprietary interface Commands 7 VIN Input Voltage for HS FET Drain. 22 mF or More Ceramic Caps must Bypass this Input to Power Ground. Place Close to Pins 8 BST Provides Bootstrap Voltage for the HS Gate Driver. A Cap is Required from this Pin to SW 9 GH Gate of HS FET 10 SW Switching Node. Provides a Return Path for the Integrat.

NCP81258 : Pin No. Pin Name Description 1 BST Floating bootstrap supply pin for the high−side gate driver. Connect the external bootstrap ca- pacitor between this pin and SW. 2 PWM Control input: PWM = High ³ DRVH is high, DRVL is low. PWM = Mid ³ Zero current detect enabled. Diode emulation mode. PWM = Low ³ DRVH is low, DRVL is high. 3 EN Control input: EN = High ³ Driver is enabled. EN = Low ³ Driver is disabled. 4 VCC Power supply input. Connect a bypass capacitor (1 mF) from this pin to ground. 5 DRVL Low−side gate drive output. Connect to the gate of the low−side MOSFET. 6 GND Bias and reference ground. All signals are referenced to this node. 7 SW Switch node. Conne.




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