DatasheetsPDF.com

IS42SM32100D Datasheet PDF


Part Number IS42SM32100D
Manufacturer ISSI
Title 512K x 32Bits x 2Banks Low Power Synchronous DRAM
Description These IS42SM/RM/VM32100D are low power 33,554,432 bits CMOS Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits. These products are o...
Features
 JEDEC standard 3.3V, 2.5V, 1.8V power supply.
• Auto refresh and self refresh.
• All pins are compatible with LVCMOS interface.
• 4K refresh cycle / 64ms.
• Programmable Burst Length and Burst Type. - 1, 2, 4, 8 or Full Page for Sequential Burst. - 4 or 8 for Interleave Burst.
• Programmable CAS L...

File Size 553.43KB
Datasheet IS42SM32100D PDF File








Similar Ai Datasheet

IS42SM32100C : These IS42SM/RM/VM32100C are low power 33,554,432 bits CMOS Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input and output voltage levels are compatible with LVCMOS. Features  JEDEC standard 3.3V, 2.5V, 1.8V power supply. • Auto refresh and self refresh. • All pins are compatible with LVCMOS interface. • 4K refresh cycle / 64ms. • Programmable Burst Length and Burst Type. - 1, 2, 4, 8 or Full Page for Sequential Bu.

IS42SM32160C : ISSI's IS42SM/RM32160C is a 512Mb Mobile Synchronous DRAM configured as a quad 4M x32 DRAM. It achieves high-speed data transfer using a pipeline architecture with a synchronous interface. All inputs and outputs signals are registered on the rising edge of the clock input, CLK. The 512Mb SDRAM is internally configured by stacking two 256Mb, 16Mx16 devices. Each of the 4M x32 banks is organized as 8192 rows by 512 columns by 32 bits. KEY TIMING PARAMETERS Parameter -7 -75 CLK Cycle Time CAS Latency = 3 7 7.5 CAS Latency = 2 9.6 9.6 CLK Frequency CAS Latency = 3 143 133 CAS Latency = 2 104 104 Access Time from CLK CAS Latency = 3 5.4 5.4 CAS Latency = 2 77 Unit ns ns Mhz Mh.

IS42SM32160E : These IS42/45SM/RM/VM32160E are mobile 536,870,912 bits CMOS Synchronous DRAM organized as 4 banks of 4,194,304 words x 32 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input and output voltage levels are compatible with LVCMOS. Features  JEDEC standard 3.3V, 2.5V, 1.8V power supply • Auto refresh and self refresh • All pins are compatible with LVCMOS interface • 8K refresh cycle every 16ms (A2 grade) or 64 ms (Industrial, A1 grade) • Programmable Burst Length and Burst Typ.




Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)