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IS64VF12832EC

ISSI
Part Number IS64VF12832EC
Manufacturer ISSI
Description SYNCHRONOUS FLOW-THROUGH SRAM
Published Nov 7, 2016
Detailed Description IS61(4)LF12836EC/IS61(4)VF12836EC/IS61(4)LF12832EC IS61(4)VF12832EC/IS61(4)LF25618EC/IS61(4)VF25618EC 128K x36/32 and 2...
Datasheet PDF File IS64VF12832EC PDF File

IS64VF12832EC
IS64VF12832EC

Overview
IS61(4)LF12836EC/IS61(4)VF12836EC/IS61(4)LF12832EC IS61(4)VF12832EC/IS61(4)LF25618EC/IS61(4)VF25618EC 128K x36/32 and 256K x18 4Mb, ECC, SYNCHRONOUS FLOW-THROUGH SRAM FEATURES DESCRIPTION APRIL 2017  Internal self-timed write cycle  Individual Byte Write Control and Global Write  Clock controlled, registered address, data and control  Burst sequence control using MODE input  Three chip enable option for simple depth expansion and address pipelining  Common data inputs and data outputs  Auto Power-down during deselect The 4Mb product family features high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications.
The IS61(64)LF/VF12836EC are organized as 131,072 words by 36bits.
The IS61(64)LF/VF12832EC are organized as 131,072 words by 32bits.
The IS61(64)LF/VF25618EC are organized as 262,144 words by 18 bits.
Fabricated with ISSI's advanced CMOS technology, the device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit.
All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.
 Single cycle deselect  Snooze MODE for reduced-power standby  JEDEC 100-pin QFP, 165-ball BGA and 119-ball BGA packages  Power supply:  LF: VDD 3.
3V (± 5%), VDDQ 3.
3V/2.
5V (± 5%)  VF: VDD 2.
5V (± 5%), VDDQ 2.
5V (± 5%) Write cycles are internally self-timed and are initiated by the rising edge of the clock input.
Write cycles can be one to four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
The byte write operation is performed by using the byte write enable (/BWE) input combined with one or more individual byte write signals (/BWx).
In addition, Global Write (/GW) is available for writing all bytes at one time, regardless of the byte write controls.
 JTAG Boundary Scan for BGA packages  Industrial and A...


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