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MR36V08G57C

LAPIS
Part Number MR36V08G57C
Manufacturer LAPIS
Description P2ROM
Published Nov 10, 2016
Detailed Description MR36V08G57C P2ROM262,144–Page × 1,024 x 32–Bit (LVNROM) FEDR36V08G57C-002-02 Issue Date: Sep. 15, 2010 FEATURES  Memo...
Datasheet PDF File MR36V08G57C PDF File

MR36V08G57C
MR36V08G57C

Overview
MR36V08G57C P2ROM262,144–Page × 1,024 x 32–Bit (LVNROM) FEDR36V08G57C-002-02 Issue Date: Sep.
15, 2010 FEATURES  Memory Configuration • 262,144 x 1,024 x 32 bit • Multiplexed Command/Address/Data  Page Read Operation • Page Size : 4,096 byte • Random access time : 1.
0us (max) for block read 1.
8us (max) for random read • Sequential Read : 40ns (min) • Read Mode Continuous Read : no wait for next page.
Page Read : need wait time for next page  Power Supply Voltage • Vcc = 3.
0 V to 3.
6 V PACKAGES ·70-pin plastic SSOP (P-SSOP70-500-0.
80-EK-MC) P2ROM ADVANCED TECHNOLOGY P2ROM stands for Production Programmed ROM.
This exclusive LAPIS Semiconductor’s technology utilizes factory test equipment for programming the customers code into the P2ROM prior to final production testing.
Advancements in this technology allows production costs to be equivalent to MASKROM and has many advantages and added benefits over the other non-volatile technologies, which...


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