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9DB106

Part Number	9DB106
Manufacturer	IDT
Description	Six Output Differential Buffer
Published	Dec 13, 2016
Detailed Description	Six Output Differential Buffer for PCIe Gen 2 DATASHEET 9DB106 Description Features/Benefits The 9DB106 zero-delay b...
Datasheet	9DB106 PDF File

Overview

Six Output Differential Buffer for PCIe Gen 2 DATASHEET 9DB106 Description Features/Benefits The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements.
The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator.
It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking.
An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications.
• • • • • CLKREQ# pin for outputs 1 and 4/ supports Express Card applications PLL or bypass mode/PLL can dejitter incoming clock Selectable PLL bandwidth/minimizes jitter peaking in downstream PLL's Spread Spectrum Compatible/tracks spreading input clock for low EMI SMBus Interface/unused outputs can be disabled Recommended Applications 6 Output Differential Buffer for PCIe Ge...

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