DatasheetsPDF.com

AD9522-5

Part Number	AD9522-5
Manufacturer	Analog Devices
Description	12 LVDS/24 CMOS Output Clock Generator
Published	Jan 2, 2017
Detailed Description	Data Sheet FEATURES Low phase noise, phase-locked loop (PLL) Supports external 3.3 V/5 V voltage controlled oscillator (...
Datasheet	AD9522-5 PDF File

Overview

Data Sheet FEATURES Low phase noise, phase-locked loop (PLL) Supports external 3.
3 V/5 V voltage controlled oscillator (VCO)/VCXO to 2.
4 GHz 1 differential or 2 single-ended reference inputs Accepts CMOS, LVPECL, or LVDS references to 250 MHz Accepts 16.
62 MHz to 33.
3 MHz crystal for reference input Optional reference clock doubler Reference monitoring capability Revertive automatic and manual reference switchover/ holdover modes Glitch-free switchover between references Automatic recovery from holdover Digital or analog lock detect, selectable Optional zero delay operation Twelve 800 MHz LVDS outputs divided into 4 groups Each group of 3 has a 1-to-32 divider with phase delay Additive output jitter as low as 242 fs rms Channel-to-channel skew grouped outputs < 60 ps Each LVDS output can be configured as 2 CMOS outputs (for fOUT ≤ 250 MHz) Automatic synchronization of all outputs on power-up Manual synchronization of outputs as needed SPI- and I²C-compatible serial control port 64-l...

Similar Datasheet

AD9522-0 12 LVDS/24 CMOS Output Clock Generator - Analog Devices
AD9522-1 12 LVDS/24 CMOS Output Clock Generator - Analog Devices
AD9522-2 12 LVDS/24 CMOS Output Clock Generator - Analog Devices
AD9522-3 12 LVDS/24 CMOS Output Clock Generator - Analog Devices
AD9522-4 12 LVDS/24 CMOS Output Clock Generator - Analog Devices
AD9522-5 12 LVDS/24 CMOS Output Clock Generator - Analog Devices

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)