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SN74LS73A

Motorola
Part Number SN74LS73A
Manufacturer Motorola
Description DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
Published Jan 9, 2017
Detailed Description DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These du...
Datasheet PDF File SN74LS73A PDF File

SN74LS73A
SN74LS73A

Overview
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs.
These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted.
The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up times are observed.
Input data is transferred to the outputs on the negative-going edge of the clock pulse.
SN54/74LS73A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY Q 13 (8) K 3 (10) LOGIC DIAGRAM (Each Flip-Flop) 1 (15) CLOCK (CP) Q 12 (9) CLEAR 2 (6) J 14 (7) MODE SELECT — TRUTH TABLE OPERATING MODE INPUTS CD J K OUTPUTS QQ Reset (Clear) Toggle Load “0” (Reset) Load “1” (Set) Hold LXXLH Hh h q q H l hLH Hh l HL Hl l qq H, h = HIGH Voltage Level L, I = LOW Voltage Level X = Don’t Care l, h (q) = Lower case letters indicate the state of the refe...


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