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CAT5241

Part Number	CAT5241
Manufacturer	Catalyst Semiconductor
Description	Quad Digitally Programmable Potentiometers
Published	Mar 23, 2005
Detailed Description	CAT5241 Quad Digitally Programmable Potentiometers (DPP™) with 64 Taps and 2-wire Interface FEATURES s Four linear-taper...
Datasheet	CAT5241 PDF File

Overview

CAT5241 Quad Digitally Programmable Potentiometers (DPP™) with 64 Taps and 2-wire Interface FEATURES s Four linear-taper digitally programmable H GEN FR ALO EE LE A D F R E ETM s Automatic recall of saved wiper settings at potentiometers s 64 resistor taps per potentiometer s End to end resistance 2.
5kΩ, 10kΩ, 50kΩ or 100kΩ s Potentiometer control and memory access via power up s 2.
5 to 6.
0 volt operation s Standby current less than 1µA s 1,000,000 nonvolatile WRITE cycles s 100 year nonvolatile memory data retention s 20-lead SOIC and TSSOP packages s Industrial temperature range 2-wire interface (I C like) s Low wiper resistance, typically 80Ω s Nonvolatile memory storage for up to four wiper 2 settings for each potentiometer DESCRIPTION The CAT5241 is four Digitally Programmable Potentiometers (DPPs™) integrated with control logic and 16 bytes of NVRAM memory.
Each DPP consists of a series of 63 resistive elements connected between two externally accessible end points.
The tap points between each resistive element are connected to the wiper outputs with CMOS switches.
A separate 6-bit control register (WCR) independently controls the wiper tap switches for each DPP.
Associated with each wiper control register are four 6-bit non-volatile memory data registers (DR) used for storing up to four wiper settings.
Writing to the wiper control register or any of the non-volatile data registers is via a 2-wire serial bus (I2C-like).
On powerup, the contents of the first data register (DR0) for each of the four potentiometers is automatically loaded into its respective wiper control register (WCR).
The CAT5241 can be used as a potentiometer or as a two terminal, variable resistor.
It is intended for circuit level or system level adjustments in a wide variety of applications.
PIN CONFIGURATION SOIC Package (J, W) TSSOP Package (U, Y) RW0 RL0 RH0 A0 A2 RW1 RL1 RH1 SDA GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 CAT 16 5241 15 14 13 12 11 VCC RW3 RL3 RH3 A1 A3 SCL RW2 RL...

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