DatasheetsPDF.com

HD74CDCF2510B

Part Number	HD74CDCF2510B
Manufacturer	Renesas
Description	3.3-V Phase-lock Loop Clock Driver
Published	Dec 4, 2017
Detailed Description	HD74CDCF2510B 140 MHz, 0 to 85°C Operation 3.3-V Phase-lock Loop Clock Driver REJ03D0828-1000 (Previous: ADE-205-225H)...
Datasheet	HD74CDCF2510B PDF File

Overview

HD74CDCF2510B 140 MHz, 0 to 85°C Operation 3.
3-V Phase-lock Loop Clock Driver REJ03D0828-1000 (Previous: ADE-205-225H) Rev.
10.
00 Apr 07, 2006 Description The HD74CDCF2510B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver.
It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.
It is specifically designed for use with synchronous DRAMs.
The HD74CDCF2510B operates at 3.
3 V VCC and is designed to drive up to five clock loads per output.
Bank of outputs provide ten low-skew, low-jitter copies of the input clock.
Output signal duty cycles are adjusted to 50 percent independent of the duty cycle at the input clock.
Bank of outputs can be enabled or disabled via the control (G) inputs.
When the G inputs are high, the outputs switch in phase and frequency with CLK; when the G inputs are low, the outputs are disabled to the logic-low state.
Unlike many products containing PLLs, the...

Similar Datasheet

HD74CDCF2510B 140 MHz/ 0 to 85C Operation 3.3-V Phase-lock Loop Clock Driver - Hitachi Semiconductor
HD74CDCF2510B 3.3-V Phase-lock Loop Clock Driver - Renesas

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)