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ODCXIP04

Part Number	ODCXIP04
Manufacturer	AMI
Description	CMOS Gate Array
Published	Mar 12, 2018
Detailed Description	2'&;,3[[ ® $0,+* PLFURQ &026 *DWH $UUD\ Description ODCXIPxx is a family of 1 to 8 mA, inverting, CMOS-level, out...
Datasheet	ODCXIP04 PDF File

Overview

2'&;,3[[ ® $0,+* PLFURQ &026 *DWH $UUD\ Description ODCXIPxx is a family of 1 to 8 mA, inverting, CMOS-level, output buffer pieces with P-channel, open-drains (pull-up).
Logic Symbol Truth Table ODCXIPxx A PADM A PADM LH HZ Z = High Impedance HDL Syntax Verilog ODCXIPxx inst_name (PADM, A); VHDL.
.
inst_name: ODCXIPxx port map (PADM, A); Pin Loading Pin Name A (eq-load) PADM (pF) ODCXIP01 2.
8 4.
92 Load ODCXIP02 ODCXIP04 2.
8 2.
8 4.
92 4.
92 ODCXIP08 3.
9 4.
93 Power Characteristics Cell Output Drive (mA) ODCXIP01 1 ODCXIP02 2 ODCXIP04 4 ODCXIP08 8 a.
See page 2-15 for power equation.
Power Characteristicsa Static IDD (TJ = 8...

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