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ODTSXX08

AMI
Part Number ODTSXX08
Manufacturer AMI
Description CMOS Gate Array
Published Mar 13, 2018
Detailed Description 2'76;;[[ ® $0,+*  PLFURQ &026 *DWH $UUD\ Description ODTSXXxx is a family of 4 to 24 mA, non-inverting, TTL-level...
Datasheet PDF File ODTSXX08 PDF File

ODTSXX08
ODTSXX08

Overview
2'76;;[[ ® $0,+*  PLFURQ &026 *DWH $UUD\ Description ODTSXXxx is a family of 4 to 24 mA, non-inverting, TTL-level, output buffer pieces with controlled slew rate outputs.
Logic Symbol Truth Table ODTSXXxx A SL PADM A PADM LL HH HDL Syntax Verilog ODTSXXxx inst_name (PADM, A); VHDL.
.
inst_name: ODTSXXxx port map (PADM, A); Pin Loading Pin Name A (eq-load) ODTSXX04 9.
3 Power Characteristics Cell Output Drive (mA) ODTSXX04 4 ODTSXX08 8 ODTSXX12 12 ODTSXX16 16 ODTSXX24 24 a.
See page 2-15 for power equation.
ODTSXX08 9.
3 Load ODTSXX12 9.
3 ODTSXX16 9.
3 Power Characteristicsa Static IDD (TJ = 85°C) (nA) TBD EQLpd (Eq-load) 198.
6 TBD 220.
0 TBD 240.
8 TBD 263.
6 TBD 282.
3 ODTSXX24 11.
4 Pad Logic 4-42 ® Propagation Delays (ns) Conditions: TJ = 25°C, VDD = 5.
0V, Typical Process Capacitive Load (pF) 15 ODTSXX04 From: A tPLH To: PADM tPLH 1.
51 3.
60 Capacitive Load (pF) 15 ODTSXX08 From: A tPLH T...


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