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M14D1G1664A

Part Number	M14D1G1664A
Manufacturer	ESMT
Description	DDR-II SDRAM
Published	Sep 20, 2018
Detailed Description	ESMT DDR II SDRAM M14D1G1664A (2S) 8M x 16 Bit x 8 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, V...
Datasheet	M14D1G1664A PDF File

Overview

ESMT DDR II SDRAM M14D1G1664A (2S) 8M x 16 Bit x 8 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.
8V ± 0.
1V, VDDQ = 1.
8V ± 0.
1V z Internal pipelined double-data-rate architecture; two data access per clock cycle z Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.
z On-chip DLL z Differential clock inputs (CLK and CLK ) z DLL aligns DQ and DQS transition with CLK transition z 8 bank operation z CAS Latency : 3, 4, 5, 6, 7 z Additive Latency: 0, 1, 2, 3, 4, 5, 6 z Burst Type : Sequential and Interleave z Burst Length : 4, 8 z All inputs except data & DM are sampled at the rising edge of the system clock(CLK) z Data I/O tr...

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