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MC9S08PL16

NXP
Part Number MC9S08PL16
Manufacturer NXP
Description 8-Bit CPU
Published Oct 18, 2018
Detailed Description NXP Semiconductors Data Sheet: Technical Data MC9S08PL16 Series Data Sheet Supports: MC9S08PL16 and MC9S08PL8 Key featur...
Datasheet PDF File MC9S08PL16 PDF File

MC9S08PL16
MC9S08PL16

Overview
NXP Semiconductors Data Sheet: Technical Data MC9S08PL16 Series Data Sheet Supports: MC9S08PL16 and MC9S08PL8 Key features • 8-Bit S08 central processor unit (CPU) – Up to 20 MHz bus at 2.
7 V to 5.
5 V across temperature range of -40 °C to 85 °C – Supporting up to 40 interrupt/reset sources – Supporting up to four-level nested interrupt – On-chip memory – Up to 16 KB flash read/program/erase over full operating voltage and temperature – Up to 256 byte EEPROM; 2-byte erase sector; program and erase while executing flash – Up to 2048 byte random-access memory (RAM) – Flash and RAM access protection • Power-saving modes – One low-power stop mode; reduced power wait mode – Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain enabled to specific peripherals in stop3 mode • Clocks – Oscillator (XOSC) - loop-controlled Pierce oscillator; crystal or ceramic resonator range of 31.
25 kHz to 39.
0625 kHz or 4 MHz to 20 MHz – Internal clock source (ICS) - containing a frequencylocked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allowing 1% deviation across temperature range of 0 °C to 70 °C and 2% deviation across temperature range of -40 °C to 85 °C; up to 20 MHz • System protection – Watchdog with independent clock source – Low-voltage detection with reset or interrupt; selectable trip points – Illegal opcode detection with reset – Illegal address detection with reset Document Number MC9S08PL16 Rev.
5, 06/2020 MC9S08PL16 • Peripherals – ACMP - one analog comparator with both positive and negative inputs; separately selectable interrupt on rising and falling comparator output; filtering – ADC - 12-channel, 10-bit resolution; 2.
5 µs conversion time; data buffers with optional watermark; automatic compare function; internal bandgap reference channel; operation in stop mode; optional hardware trigger – CRC - programmable cyclic redundancy check module – FTM - two flex ...


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