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74HC595-Q100

nexperia
Part Number 74HC595-Q100
Manufacturer nexperia
Description serial or parallel-out shift register
Published Jan 9, 2019
Detailed Description 74HC595-Q100; 74HCT595-Q100 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state Rev. ...
Datasheet PDF File 74HC595-Q100 PDF File

74HC595-Q100
74HC595-Q100

Overview
74HC595-Q100; 74HCT595-Q100 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state Rev.
4 — 11 March 2020 Product data sheet 1.
General description The 74HC595-Q100; 74HCT595-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs.
Both the shift and storage register have separate clocks.
The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input.
A LOW on MR will reset the shift register.
Data is shifted on the LOW-to-HIGH transitions of the SHCP input.
The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input.
If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
Data in the storage register appears at the output whenever the output enable input (OE) is LOW.
A HIGH on OE causes the outputs to assume a high-impedance...


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