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PT7M3808

Diodes
Part Number PT7M3808
Manufacturer Diodes
Description Low Quiescent Programmable-Delay Supervisory
Published May 31, 2019
Detailed Description Description Application(s)      PT7M3808 Low Quiescent Programmable-Delay Supervisory Features          ...
Datasheet PDF File PT7M3808 PDF File

PT7M3808
PT7M3808

Overview
Description Application(s)      PT7M3808 Low Quiescent Programmable-Delay Supervisory Features              Notes: 1.
No purposely added lead.
Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
2.
See https://www.
diodes.
com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3.
Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
PT7M3808 Document Number DS43298 Rev 7-2 www.
diodes.
com 1 June 2023 © 2023 Copyright Diodes Incorporated.
All Rights Reserved.
Block Diagram PT7M3808 Adjustable Voltage Diagram (PT7M3808G01) Fixed Voltage Diagram PT7M3808 Document Number DS43298 Rev 7-2 www.
diodes.
com 2 June 2023 © 2023 Copyright Diodes Incorporated.
All Rights Reserved.
Pin Configuration PT7M3808 Pin Description Pin# SOT23 TDFN 1 6 2 5 3 4 4 3 5 2 6 1 - PAD Pin Name Description RESET GND MR CT SENSE VDD Thermal Pad An open-drain output that is driven to a low impedance state when RESET is asserted.
RESET will remain low (asserted) for the reset period after both SENSE is above VIT and MR is set to a logic high.
A pull-up resistor from 10kΩ to 1Mohm should be used on this pin, and allows the reset pin to attain voltages higher than VDD.
Ground.
Driving the manual reset pin ( MR ) low asserts RESET .
MR is internally tied to VDD by a 90kohm pull-up resistor.
Reset period programming pin.
Connection this pin to VDD through a 40kΩ to 200kΩ resistor for 300ms or leaving it open results in fixed delay times 20ms.
And connecting this pin with a cap ≥ 100pF to ground a user-programmable delay time.
This pin is connected to the voltage to be monitored.
If the voltage at this terminal drops below the threshold voltage VIT, then RESET is asserted.
Supply Voltage.
Place a 0.
1uF ceramic capacitor c...


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