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74AHC273-Q100

Part Number	74AHC273-Q100
Manufacturer	nexperia
Description	Octal D-type flip-flop
Published	Jul 26, 2019
Detailed Description	74AHC273-Q100; 74AHCT273-Q100 Octal D-type flip-flop with reset; positive-edge trigger Rev. 2 — 23 September 2020 Pr...
Datasheet	74AHC273-Q100 PDF File

Overview

74AHC273-Q100; 74AHCT273-Q100 Octal D-type flip-flop with reset; positive-edge trigger Rev.
2 — 23 September 2020 Product data sheet 1.
General description The 74AHC273-Q100; 74AHCT273-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).
It is specified in compliance with JEDEC standard No.
7-A.
The 74AHC273-Q100; 74AHCT273-Q100 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.
The common clock (CP) and master reset (MR) inputs, load and reset (clear) all flip-flops simultaneously.
The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output ...

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74AHC273-Q100 Octal D-type flip-flop - nexperia

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