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74AHCT2G00-Q100

nexperia
Part Number 74AHCT2G00-Q100
Manufacturer nexperia
Description Dual 2-input NAND gate
Published Jul 26, 2019
Detailed Description 74AHC2G00-Q100; 74AHCT2G00-Q100 Dual 2-input NAND gate Rev. 3 — 8 March 2019 Product data sheet 1. General description...
Datasheet PDF File 74AHCT2G00-Q100 PDF File

74AHCT2G00-Q100
74AHCT2G00-Q100

Overview
74AHC2G00-Q100; 74AHCT2G00-Q100 Dual 2-input NAND gate Rev.
3 — 8 March 2019 Product data sheet 1.
General description The 74AHC2G00-Q100; 74AHCT2G00-Q100 are high-speed Si-gate CMOS devices.
They provide two 2-input NAND gates.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.
5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.
5 V to 5.
5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
2.
Features and benefits • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C • Symmetrical output impedance • High noise immunity • ESD protection: • MIL-STD-883, method 3015 exceeds 2000 V • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 Ω) • Low power dissipation • Balanced propagation delays 3.
Ordering information Table 1.
Ordering information Type number Package Temperature range Name 74AHC2G00DP-Q100 -40 °C to +125 °C TSSOP8 74AHC2G00DC-Q100 -40 °C to +125 °C 74AHCT2G00DC-Q100 VSSOP8 Description Version plastic thin shrink small outline package; 8 leads; SOT505-2 body width 3 mm; lead length 0.
5 mm plastic very thin shrink small outline package; 8 leads; body width 2.
3 mm SOT765-1 4.
Marking Table 2.
Marking Type number 74AHC2G00DP-Q100 74AHC2G00DC-Q100 74AHCT2G00DC-Q100 Marking code[1] A00 A00 C00 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Nexperia 74AHC2G00-Q100; 74AHCT2G00-Q100 Dual 2-input NAND gate 5.
Functional diagram 1A 1B 2A 2B Fig.
1.
Logic symbol 1Y 2Y 001aah748 Fig.
3.
Logic diagram (one gate) 6.
Pinning information B A & & 001aah749 Fig.
2.
IEC logic symbol Y mna099 6.
1.
Pinning 74AHC2G00 74AHCT2G00 1A 1 1B 2 2Y 3 GND 4 8 VCC 7 1Y 6 2B 5 2A 001aaj388 Fig.
4.
Pin configuration SOT505-2 (TSSOP8) and ...


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