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74AHCT377-Q100

Part Number	74AHCT377-Q100
Manufacturer	nexperia
Description	Octal D-type flip-flop
Published	Jul 26, 2019
Detailed Description	74AHC377-Q100; 74AHCT377-Q100 Octal D-type flip-flop with data enable; positive-edge trigger Rev. 1 — 3 December 2013 ...
Datasheet	74AHCT377-Q100 PDF File

Overview

74AHC377-Q100; 74AHCT377-Q100 Octal D-type flip-flop with data enable; positive-edge trigger Rev.
1 — 3 December 2013 Product data sheet 1.
General description The 74AHC377-Q100; 74AHCT377-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).
It is specified in compliance with JEDEC standard No.
7-A.
The 74AHC377-Q100; 74AHCT377-Q100 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.
A common clock input (CP) loads all flip-flops simultaneously when the data enable input (E) is LOW.
The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop.
The E input is only required to be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
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74AHCT377-Q100 Octal D-type flip-flop - nexperia

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