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74AUP1G02-Q100

nexperia
Part Number 74AUP1G02-Q100
Manufacturer nexperia
Description Low-power 2-input NOR gate
Published Jul 29, 2019
Detailed Description 74AUP1G02-Q100 Low-power 2-input NOR gate Rev. 3 — 13 January 2022 Product data sheet 1. General description The 74AUP...
Datasheet PDF File 74AUP1G02-Q100 PDF File

74AUP1G02-Q100
74AUP1G02-Q100


Overview
74AUP1G02-Q100 Low-power 2-input NOR gate Rev.
3 — 13 January 2022 Product data sheet 1.
General description The 74AUP1G02-Q100 is a single 2-input NOR gate.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device ensures very low static and dynamic power consumption across the entire VCC range from 0.
8 V to 3.
6 V.
This device is fully specified for partial power down applications using IOFF.
The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
2.
Features and benefits • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C • Wide supply voltage range from 0.
8 V to 3.
6 V • CMOS low power dissipation • High noise immunity • Overvoltage tolerant inputs to 3.
6 V • Low noise overshoot and undershoot < 10 % of VCC • IOFF circuitry provides partial Power-down mode operation • Latch-up performance exceeds 100 mA per JESD 78 Class II • Low static power consumption; ICC = 0.
9 μA (maximum) • Complies with JEDEC standards: • JESD8-12 (0.
8 V to 1.
3 V) • JESD8-11 (0.
9 V to 1.
65 V) • JESD8-7 (1.
2 V to 1.
95 V) • JESD8-5 (1.
8 V to 2.
7 V) • JESD8-B (2.
7 V to 3.
6 V) • ESD protection: • MIL-STD-883, method 3015 Class 3A.
Exceeds 5000 V • HBM JESD22-A114F Class 3A.
Exceeds 5000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) 3.
Ordering information Table 1.
Ordering information Type number Package Temperature range 74AUP1G02GW-Q100 -40 °C to +125 °C Name TSSOP5 Description Version plastic thin shrink small outline package; 5 leads; SOT353-1 body width 1.
25 mm Nexperia 74AUP1G02-Q100 Low-power 2-input NOR gate 4.
Marking Table 2.
Marking Type number 74AUP1G02GW-Q100 Marking code[1] pB [1] The pi...



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